Add sampler slots usage and inputs/outputs count to GPU shader program bindings meta
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@@ -112,15 +112,13 @@ bool GPUPipelineState::Init(const Description& desc)
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#endif
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// Cache shader stages usage flags for pipeline state
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_meta.InstructionsCount = 0;
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_meta.UsedCBsMask = 0;
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_meta.UsedSRsMask = 0;
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_meta.UsedUAsMask = 0;
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Platform::MemoryClear(&_meta, sizeof(_meta));
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#define CHECK_STAGE(stage) \
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if (desc.stage) { \
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_meta.UsedCBsMask |= desc.stage->GetBindings().UsedCBsMask; \
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_meta.UsedSRsMask |= desc.stage->GetBindings().UsedSRsMask; \
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_meta.UsedUAsMask |= desc.stage->GetBindings().UsedUAsMask; \
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_meta.UsedSamplersMask |= desc.stage->GetBindings().UsedSamplersMask; \
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}
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CHECK_STAGE(VS);
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CHECK_STAGE(HS);
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@@ -215,6 +215,14 @@ public:
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return _meta.UsedUAsMask;
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}
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/// <summary>
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/// Gets texture samplers mask (each set bit marks usage of the sampler slot at the bit index slot). Combined from all the used shader stages.
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/// </summary>
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FORCE_INLINE uint32 GetUsedSamplersMask() const
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{
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return _meta.UsedSamplersMask;
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}
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public:
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/// <summary>
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/// Returns true if pipeline state is valid and ready to use
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@@ -12,7 +12,7 @@ class GPUShaderProgram;
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/// <summary>
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/// The runtime version of the shaders cache supported by the all graphics back-ends. The same for all the shader cache formats (easier to sync and validate).
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/// </summary>
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#define GPU_SHADER_CACHE_VERSION 12
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#define GPU_SHADER_CACHE_VERSION 13
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/// <summary>
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/// The GPU resource with shader programs that can run on the GPU and are able to perform rendering calculation using textures, vertices and other resources.
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@@ -21,6 +21,9 @@ struct FLAXENGINE_API ShaderBindings
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uint32 UsedCBsMask;
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uint32 UsedSRsMask;
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uint32 UsedUAsMask;
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uint32 UsedSamplersMask;
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uint16 InputsCount;
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uint16 OutputsCount;
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FORCE_INLINE bool IsUsingCB(uint32 slotIndex) const
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{
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@@ -36,6 +39,11 @@ struct FLAXENGINE_API ShaderBindings
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{
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return (UsedUAsMask & (1u << slotIndex)) != 0u;
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}
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FORCE_INLINE bool IsUsingSampler(uint32 slotIndex) const
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{
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return (UsedSamplersMask & (1u << slotIndex)) != 0u;
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}
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};
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struct GPUShaderProgramInitializer
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@@ -79,6 +79,9 @@ namespace
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{
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bool ProcessShader(ShaderCompilationContext* context, Array<ShaderCompiler::ShaderResourceBuffer>& constantBuffers, ID3D11ShaderReflection* reflector, D3D11_SHADER_DESC& desc, ShaderBindings& bindings)
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{
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bindings.InputsCount = desc.InputParameters;
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bindings.OutputsCount = desc.OutputParameters;
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// Extract constant buffers usage information
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for (uint32 a = 0; a < desc.ConstantBuffers; a++)
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{
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@@ -131,13 +134,12 @@ namespace
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{
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// Sampler
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case D3D_SIT_SAMPLER:
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bindings.UsedSamplersMask |= 1 << resDesc.BindPoint;
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break;
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// Constant Buffer
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case D3D_SIT_CBUFFER:
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case D3D_SIT_TBUFFER:
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break;
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// Shader Resource
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case D3D_SIT_TEXTURE:
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case D3D_SIT_STRUCTURED:
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@@ -145,7 +147,6 @@ namespace
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for (UINT shift = 0; shift < resDesc.BindCount; shift++)
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bindings.UsedSRsMask |= 1 << (resDesc.BindPoint + shift);
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break;
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// Unordered Access
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case D3D_SIT_UAV_RWTYPED:
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case D3D_SIT_UAV_RWSTRUCTURED:
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@@ -316,7 +317,7 @@ bool ShaderCompilerD3D::CompileShader(ShaderFunctionMeta& meta, WritePermutation
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additionalDataVS.Inputs.Add({ ParseVertexElementType(inputDesc.SemanticName, inputDesc.SemanticIndex), 0, 0, 0, format });
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}
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}
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ShaderBindings bindings = { desc.InstructionCount, 0, 0, 0 };
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ShaderBindings bindings = { desc.InstructionCount };
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if (ProcessShader(_context, _constantBuffers, reflector.Get(), desc, bindings))
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return true;
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@@ -372,7 +372,9 @@ bool ShaderCompilerDX::CompileShader(ShaderFunctionMeta& meta, WritePermutationD
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}
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DxShaderHeader header;
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Platform::MemoryClear(&header, sizeof(header));
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ShaderBindings bindings = { desc.InstructionCount, 0, 0, 0 };
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ShaderBindings bindings = { desc.InstructionCount };
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bindings.InputsCount = desc.InputParameters;
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bindings.OutputsCount = desc.OutputParameters;
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for (uint32 a = 0; a < desc.ConstantBuffers; a++)
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{
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auto cb = shaderReflection->GetConstantBufferByIndex(a);
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@@ -422,13 +424,12 @@ bool ShaderCompilerDX::CompileShader(ShaderFunctionMeta& meta, WritePermutationD
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{
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// Sampler
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case D3D_SIT_SAMPLER:
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bindings.UsedSamplersMask |= 1 << resDesc.BindPoint;
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break;
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// Constant Buffer
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case D3D_SIT_CBUFFER:
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case D3D_SIT_TBUFFER:
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break;
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// Shader Resource
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case D3D_SIT_TEXTURE:
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for (UINT shift = 0; shift < resDesc.BindCount; shift++)
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@@ -445,7 +446,6 @@ bool ShaderCompilerDX::CompileShader(ShaderFunctionMeta& meta, WritePermutationD
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header.SrDimensions[resDesc.BindPoint + shift] = D3D_SRV_DIMENSION_BUFFER;
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}
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break;
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// Unordered Access
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case D3D_SIT_UAV_RWTYPED:
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case D3D_SIT_UAV_RWSTRUCTURED:
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@@ -728,7 +728,9 @@ bool ShaderCompilerVulkan::CompileShader(ShaderFunctionMeta& meta, WritePermutat
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void* additionalData = nullptr;
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SpirvShaderHeader header;
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Platform::MemoryClear(&header, sizeof(header));
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ShaderBindings bindings = { 0, 0, 0, 0 };
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ShaderBindings bindings = {};
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bindings.InputsCount = program.getNumPipeInputs();
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bindings.OutputsCount = program.getNumPipeOutputs();
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if (type == ShaderStage::Vertex)
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{
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additionalData = &additionalDataVS;
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@@ -822,6 +824,10 @@ bool ShaderCompilerVulkan::CompileShader(ShaderFunctionMeta& meta, WritePermutat
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switch (descriptor.BindingType)
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{
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case SpirvShaderResourceBindingType::SAMPLER:
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ASSERT_LOW_LAYER(descriptor.Slot >= 0 && descriptor.Slot < GPU_MAX_SAMPLER_BINDED);
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bindings.UsedSamplersMask |= 1 << descriptor.Slot;
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break;
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case SpirvShaderResourceBindingType::CB:
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ASSERT_LOW_LAYER(descriptor.Slot >= 0 && descriptor.Slot < GPU_MAX_CB_BINDED);
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bindings.UsedCBsMask |= 1 << descriptor.Slot;
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