Add build setting for target CPU architecture in C++ compile environment

This commit is contained in:
2023-09-03 17:52:03 +03:00
parent 20a92a994e
commit e8cb1686c3
6 changed files with 107 additions and 2 deletions

View File

@@ -221,6 +221,15 @@ API_ENUM() enum class ArchitectureType
#if defined(__SSE4_2__)
#define PLATFORM_SIMD_SSE4_2 1
#endif
#if defined(__AVX__)
#define PLATFORM_SIMD_AVX 1
#endif
#if defined(__AVX2__)
#define PLATFORM_SIMD_AVX2 1
#endif
#if defined(__AVX512F__) && defined(__AVX512CD__) && defined(__AVX512BW__) && defined(__AVX512DQ__) && defined(__AVX512VL__)
#define PLATFORM_SIMD_AVX512 1
#endif
#endif
#if defined(_M_ARM) || defined(__ARM_NEON__) || defined(__ARM_NEON)
#define PLATFORM_SIMD_NEON 1

View File

@@ -84,6 +84,36 @@ namespace Flax.Build.NativeCpp
Latest,
}
/// <summary>
/// The CPU architecture / instruction set.
/// </summary>
public enum CpuArchitecture
{
/// <summary>
/// Default architecture (unspecified)
/// </summary>
Default,
// X86-64 instruction sets:
/// <summary>
/// AVX
/// </summary>
AVX,
/// <summary>
/// AVX2
/// </summary>
AVX2,
/// <summary>
/// AVX512
/// </summary>
AVX512,
// TODO: Add other instruction sets for ARM and other platforms.
}
/// <summary>
/// The C++ compilation environment required to build source files in the native modules.
/// </summary>
@@ -174,6 +204,11 @@ namespace Flax.Build.NativeCpp
/// </summary>
public bool IntrinsicFunctions = false;
/// <summary>
/// The minimum target CPU architecture.
/// </summary>
public CpuArchitecture Architecture = CpuArchitecture.Default;
/// <summary>
/// Enables buffer security checks.
/// </summary>
@@ -236,6 +271,7 @@ namespace Flax.Build.NativeCpp
RuntimeChecks = RuntimeChecks,
StringPooling = StringPooling,
IntrinsicFunctions = IntrinsicFunctions,
Architecture = Architecture,
BufferSecurityCheck = BufferSecurityCheck,
TreatWarningsAsErrors = TreatWarningsAsErrors,
PrecompiledHeaderUsage = PrecompiledHeaderUsage,

View File

@@ -124,6 +124,7 @@ namespace Flax.Build.Platforms
switch (Architecture)
{
case TargetArchitecture.x64:
// TODO: compileEnvironment.Architecture?
commonArgs.Add("-msse2");
break;
}

View File

@@ -348,6 +348,25 @@ namespace Flax.Build.Platforms
break;
}
if (Architecture == TargetArchitecture.x86 || Architecture == TargetArchitecture.x64)
{
switch (compileEnvironment.Architecture)
{
case CpuArchitecture.Default:
//commonArgs.Add("-march=x86-64");
break;
case CpuArchitecture.AVX:
commonArgs.Add("-march=sandybridge");
break;
case CpuArchitecture.AVX2:
commonArgs.Add("-march=x86-64-v3");
break;
case CpuArchitecture.AVX512:
commonArgs.Add("-march=x86-64-v4");
break;
}
}
commonArgs.Add("-Wdelete-non-virtual-dtor");
commonArgs.Add("-fno-math-errno");
commonArgs.Add("-fdiagnostics-format=msvc");

View File

@@ -469,6 +469,26 @@ namespace Flax.Build.Platforms
if (compileEnvironment.IntrinsicFunctions)
commonArgs.Add("/Oi");
// Minimum target architecture
if (Architecture == TargetArchitecture.x64)
{
switch (compileEnvironment.Architecture)
{
case CpuArchitecture.AVX:
commonArgs.Add("/arch:AVX");
break;
case CpuArchitecture.AVX2:
commonArgs.Add("/arch:AVX2");
break;
case CpuArchitecture.AVX512:
commonArgs.Add("/arch:AVX512");
break;
case CpuArchitecture.Default:
default:
break;
}
}
// Enable Function-Level Linking
if (compileEnvironment.FunctionLevelLinking)
commonArgs.Add("/Gy");

View File

@@ -327,7 +327,7 @@ namespace Flax.Build.Projects.VisualStudio
vcFiltersFileContent.AppendLine(" </ItemGroup>");
// IntelliSense information
var additionalDefinitions = project.Defines.ToList();
var additionalOptions = new List<string>();
switch (project.Configurations[0].TargetBuildOptions.CompileEnv.CppVersion)
{
@@ -345,8 +345,28 @@ namespace Flax.Build.Projects.VisualStudio
break;
}
switch (project.Configurations[0].TargetBuildOptions.CompileEnv.Architecture)
{
case CpuArchitecture.Default:
break;
case CpuArchitecture.AVX512:
additionalDefinitions.Add("__AVX512F__");
additionalDefinitions.Add("__AVX512CD__");
additionalDefinitions.Add("__AVX512BW__");
additionalDefinitions.Add("__AVX512DQ__");
additionalDefinitions.Add("__AVX512VL__");
goto case CpuArchitecture.AVX2;
case CpuArchitecture.AVX2:
additionalDefinitions.Add("__AVX2__");
goto case CpuArchitecture.AVX;
case CpuArchitecture.AVX:
additionalDefinitions.Add("__AVX__");
break;
}
vcProjectFileContent.AppendLine(" <PropertyGroup>");
vcProjectFileContent.AppendLine(string.Format(" <NMakePreprocessorDefinitions>$(NMakePreprocessorDefinitions){0}</NMakePreprocessorDefinitions>", (project.Defines.Count > 0 ? (";" + string.Join(";", project.Defines)) : "")));
vcProjectFileContent.AppendLine(string.Format(" <NMakePreprocessorDefinitions>$(NMakePreprocessorDefinitions){0}</NMakePreprocessorDefinitions>", (additionalDefinitions.Count > 0 ? (";" + string.Join(";", additionalDefinitions)) : "")));
vcProjectFileContent.AppendLine(string.Format(" <NMakeIncludeSearchPath>$(NMakeIncludeSearchPath){0}</NMakeIncludeSearchPath>", (project.SearchPaths.Length > 0 ? (";" + string.Join(";", project.SearchPaths)) : "")));
vcProjectFileContent.AppendLine(" <NMakeForcedIncludes>$(NMakeForcedIncludes)</NMakeForcedIncludes>");
vcProjectFileContent.AppendLine(" <NMakeAssemblySearchPath>$(NMakeAssemblySearchPath)</NMakeAssemblySearchPath>");